Information Package / Course Catalogue
Logic Design
Course Code: EE205
Course Type: Required
Couse Group: First Cycle (Bachelor's Degree)
Education Language: English
Work Placement: N/A
Theory: 3
Prt.: 0
Credit: 3
Lab: 0
ECTS: 3
Objectives of the Course

The objective of this course is to introduce the digital system concepts beginning with number systems and boolean algebra. Logic design concept will be discussed via subjects like combinational and sequential digital circuits, components and high level integrated circuits.

Course Content

Introduction to Binary Systems; Boolean Algebra and Logic Gates; Combinational and Sequential Logic Circuits; Registers, Counters and Memory; high level integrated circuits.

Name of Lecturer(s)
Lec. Mümtaz YILMAZ
Learning Outcomes
1.To learn the basics of digital systems and binary algebra
2.To learn combinational and sequential circuit fundamentals
3.To understand logic simplification using Karnaugh Maps
4.To learn logic gates, latches and flip flops.
5.To identify specifications of logic gates and design logic circuits
Recommended or Required Reading
1.Mano M.M., Ciletti M.D., Digital Design, 5th Ed., ISBN: 0132774208 Prentice Hall, 2012.
Weekly Detailed Course Contents
Week 1 - Theoretical
Number systems and binary artihmetic, signed numbers.
Week 2 - Theoretical
Boolean Algebra, Boolean theorems, canonical and standart methods
Week 3 - Theoretical
Boolean function simplification
Week 4 - Theoretical
Logic gates, design with NAND ve NOR gates
Week 5 - Theoretical
Karnaugh maps and map simplification methods
Week 6 - Theoretical
Karnaugh maps and map simplification methods
Week 7 - Theoretical
Design and analysis procedure of combinational circuits
Week 8 - Theoretical
Adders, multipliers, comparators, EX-OR gates and parity bit generation
Week 9 - Theoretical
Combinational circuit blocks, encoders, decoders, multiplexers
Week 10 - Theoretical
Latches and flip-flops
Week 11 - Theoretical
Analysis of synchronous sequential circuits, state table and state transition diagram.
Week 12 - Theoretical
Design of synchronous sequential circuits
Week 13 - Theoretical
Registers, shift registers
Week 14 - Theoretical
Memory structures, RAM memories, , memory decoding
Assessment Methods and Criteria
Type of AssessmentCountPercent
Midterm Examination1%40
Final Examination1%60
Workload Calculation
ActivitiesCountPreparationTimeTotal Work Load (hours)
Lecture - Theory140342
Individual Work140114
Midterm Examination1527
Final Examination110212
TOTAL WORKLOAD (hours)75
Contribution of Learning Outcomes to Programme Outcomes
PÇ-1
PÇ-2
PÇ-3
PÇ-4
PÇ-5
PÇ-6
PÇ-7
PÇ-8
PÇ-9
PÇ-10
PÇ-11
OÇ-1
3
3
3
3
3
1
1
1
1
1
3
OÇ-2
3
3
2
3
2
1
1
1
1
1
1
OÇ-3
3
3
2
2
2
1
1
1
1
1
1
OÇ-4
3
3
2
3
2
1
1
1
1
1
1
OÇ-5
3
3
4
3
3
1
1
1
1
1
3
Adnan Menderes University - Information Package / Course Catalogue
2026