Information Package / Course Catalogue
Logic Design Laboratory
Course Code: EE207
Course Type: Required
Couse Group: First Cycle (Bachelor's Degree)
Education Language: English
Work Placement: N/A
Theory: 0
Prt.: 0
Credit: 1
Lab: 2
ECTS: 2
Objectives of the Course

The objective of this course is to implement applications related with logic design. Beginning with basic experiments using logic gates, complex combinational, sequential and high level integrated circuits will be realized.

Course Content

Introduction to Binary Systems, Boolean Algebra and Logic Gates, Combinational Logic and Sequential Logic Circuits, Registers, Counters and Memory, high level integrated circuits

Name of Lecturer(s)
Lec. Mümtaz YILMAZ
Learning Outcomes
1.To learn the basics of digital systems and binary algebra
2.To learn combinational and sequential circuit fundamentals
3.To understand logic simplification and Karnaugh Maps
4.To learn logic gates, latches and flip flops
5.To identify specifications of logic gates and design logic circuits
6.To realize hardware implementation.
Recommended or Required Reading
1.Mano M.M., Ciletti M.D., Digital Design, 5th Ed., ISBN: 0132774208 Prentice Hall, 2012.
Weekly Detailed Course Contents
Week 1 - Laboratory
Logic Design Simulation Tools
Week 2 - Laboratory
Basic logic gates and truth tables
Week 3 - Laboratory
Logic circuits and simplification by using Boolean algebra
Week 4 - Laboratory
Application of DeMorgan’s Theorem
Week 5 - Laboratory
EX-OR gate and parity bit generation
Week 6 - Laboratory
NAND and NOR gates
Week 7 - Laboratory
Adders and Comparators
Week 8 - Laboratory
Seven Segment Display Decoder Design
Week 9 - Laboratory
Combinational Logic Using Multiplexers
Week 10 - Laboratory
Latches
Week 11 - Laboratory
Flip-Flops
Week 12 - Laboratory
Sequential logic circuit design
Week 13 - Laboratory
Registers, shift registers
Week 14 - Laboratory
Counters
Assessment Methods and Criteria
Type of AssessmentCountPercent
Final Examination1%60
Practice14%40
Workload Calculation
ActivitiesCountPreparationTimeTotal Work Load (hours)
Laboratory141242
Final Examination1538
TOTAL WORKLOAD (hours)50
Contribution of Learning Outcomes to Programme Outcomes
PÇ-1
PÇ-2
PÇ-3
PÇ-4
PÇ-5
PÇ-6
PÇ-7
PÇ-8
PÇ-9
PÇ-10
PÇ-11
OÇ-1
4
3
3
3
3
2
1
1
1
1
2
OÇ-2
4
3
3
3
3
2
1
1
1
1
2
OÇ-3
4
3
3
3
3
2
1
1
1
1
2
OÇ-4
4
3
4
3
4
2
1
2
1
1
2
OÇ-5
4
3
4
4
4
2
1
2
2
1
3
OÇ-6
4
3
4
4
4
2
1
3
2
2
3
Adnan Menderes University - Information Package / Course Catalogue
2026