This course aims to introduce basic concepts and techniques commonly used in designing today's high performance modern microprocessors from RISC architecture point of view. The advances in microprocessor technology, physical limitations and the basic characteristics which will be possibly boasted in next generation processors are covered. By assisting students to build a strong background in processor technology, they gain the ability to easily follow new developments in next generation processor technologies.

The performance oriented approaches based on parallelism are covered. Among the performance oriented approaches that are greatly emphasized in the course and commonly used in superscalar architectures as well are pipelining, dynamic instruction scheduling, compiler-based scheduling, branch prediction, speculative execution, and software pipeline. Memory hierarchy is introduced, and its effects on the system performance are explained. The major characteristics of state-of-the-art chip multiprocessors (CMP) and their cache hierarchy are covered. Moreover, the relationships and interactions between the operating system, hardware, and compiler are examined from system performance point of view.